Thursday, December 9, 2021

Roland M-240 PSU

I have an old Roland mixer, the M240. I've had it for years, ever since some idiot screwed me over when i bought it, promising to send me the power supply but never doing so. I did a little research of the internals here: http://atosynth.blogspot.com/2013/07/roland-m-240-power-supply.html

Today I finally googled a bit about it again, and found two interesting posts made about a year after mine:


https://djjondent.blogspot.com/2014/10/roland-m-240-mixer-power-supply.html

https://djjondent.blogspot.com/2014/11/roland-mixer-power-supply-replacement.html


Basically it says that the PSU is a simple centre tapped transformer with a diode rectifier and two caps. From Jon's posts it is clear that at least the Boss PSU he uses has two large filter caps in it - it's hard to read the ratings - 35V is clear but is it 220uF or 2200uF? In any case there are two 2200uF caps in the M240 so anything (or nothing?) would be fine I guess.


Jon uses the Boss ACE-120 but that is not the original PSU for the mixer and it is 300mA, not 500mA. I couldn't find an ACE-240 anywere either, so I had a look in the owner's manual for the M240. It says the following:


Aha, so for my 240V mixer I need the ACC-240A or E, not sure what the difference is - and it is rated at 32VA

It would be quite easy to build a power supply, but I will still have to find a matching plug and THAT won't be easy. 

Friday, August 20, 2021

Analogish bit crusher

 I just came across this great post about an analogish bit crusher and sample rate reducer from Juanito Moore and Kristian BlĂ„sol in the Synth-DIY group on facebook:


When I made my mcu-based bit crusher I was thinking about doing something similar but couldn't think of how to do the actual bit crushing - this solves that :)

But that got me thinking - could we do away with the ADC too?

Turns out we can of course. By making a flash ADC using comparators for example:


Instead of the 8-to-3 line encoder we could put D flip-flops and clock them, to reduce sample rate. Maybe we could even find a way to re-use the flip-flop as a switch, to combine it with the bit crush-comparator outputs? D flip flops with preset and clear seem able to do this as long as preset/clear are level controlled, not edge.

We can also use the 40174 hex D-storage, which stores 6 bits of info (but does not have a preset though)

If we want to go all-analog we could instead use sample and hold buffers for the bits, though we may not be able to have a combination of both very high and low sample rates as the leakage during hold vs charge time during sample may be incompatible. This could be improved by using a second set of comparators on the output of the S&H so that a voltage drop won't be visible on the DAC side of things, but now things start getting a bit complicated :-D


All in all not a terribly practical project, but fun none the less.

Thursday, July 15, 2021

Opening a waveshare 2k screen

I bought this 9" 2k screen recently:

https://www.waveshare.com/product/raspberry-pi/displays/lcd-oled/9inch-2560x1600-monitor.htm 

https://www.waveshare.com/wiki/9inch_2560x1600_Monitor




As I intend to use it for my synth, I want to extract the screen from the box - or at very least find a way to safely mount it and attach the cables inside the synth.

I contacted waveshare support, and while they said that they could not do this for me (not a problem) for such a low volume, they did send me some great pics of how to open the rear, which also means that I can possibly access and move the connector boards. I may not be able to fully remove the screen though, so I need to create some kind of bezel for it.

Oh, and I almost forgot - accessing the insides means I can connect wires to the on/off button to control it digitally.




Here is a cool ribbon cable based hdmi: https://www.aliexpress.com/item/1005002200767476.html?spm=a2g0o.productlist.0.0.726a3ff1r9Ggaf&aem_p4p_detail=2021071512223512888029912608890037608317

Wednesday, July 14, 2021

Super saw analysis ideas

I found a post on Matrixsynth today that lead me to a second paper analysing the JP8000 super saw. 

The post: https://www.matrixsynth.com/2021/07/korg-nts-1-nutekt-digital-synthesizer.html

The project: https://github.com/GrahamJamesKeane/UberSaw

The project page: https://korgnts1beginnersguide.wordpress.com/

Adam Szabo: How to Emulate the Super Saw: https://korgnts1beginnersguide.files.wordpress.com/2021/07/szabo_adam_10131.pdf

Alex Shore - An Analysis of Roland’s Super Saw Oscillator and its Relation to Pads within Trance Music: https://korgnts1beginnersguide.files.wordpress.com/2021/07/ananalysisofrolandssupersawoscillatoranditsrelationtopadswithintrancemusic-researchproject-a.shore_.pdf


This got me thinking - I still think the detune response looks like it consists of three linear components instead of a 11th order polynom like Adam Szabo shows in his paper (I did in 2014 as well when making my analog 7-saw module).

I really want to test my theory in detail, but that requires some automation. Here's my idea:

- Control the JP through webMidi

- Loop through all midi values for detune

- Use a js spectrum analyzer, for example https://github.com/hvianna/audioMotion-analyzer to find the frequency components. We should be able to find 7 distinct maximums (the 7 oscillators). 

- For each maximum, record the pitch and amplitude, possibly as an average over several samples

- Build tables for each oscillator/detune setting and calculate spread and pot response to see what the actual response is.


Edit: I've been looking at the Web Audio API lately, and using it directly could be a good option. It works by chaining nodes, one of them being a FFT node. I assume that can be used for finding the maximums. 

Friday, June 11, 2021

Envelope stage curve calculations

For the XM8 we want different response curves to choose from for each stage. By default, the stage is linear. We then use lookup tables to get other responses.

Each curve is stretched in time and amplitude by the envelope code, so the only requirement is that a curve starts at (0,0) and ends at (1,1) (or, for ease of use here, starts at (0,1) and ends at (1,0).

Below are the general formulas for three types of curves - squared, exponential and logarithmic. As neither exponential nor logarithmic will pass through the necessary points by default, we add a multiplier and a constant to fit the curve. In addition, we add a parameter that can change the steepness of the curve to give the user some variation (the Andromeda A6 has three exponential and three logarithmic to choose froom.

The Modor synthesizer also has the option of using squared reciprocal and reciprocal. I've dropped these in favour of multiple variations of the others. 


General goal


We want various curves that go from (x, y) = (0, 0) to (1, 1),  or from (1,0) to (0,1):


Squared

A rising variant, going from (0,0) to (1,1), would be

y = x^2

The falling variant, going from (1,0) to (0, 1) would be

y = (1-x)^2 

These functions already fulfill the requirements.




Exponential

General exponential functions can be written as

y = ae^(bx) + c


where

- a transposes along x

- c transposes along y

- b selects steepness. Larger b = steeper curve

b chooses the "steepness" of the curve.


To solve, select a value for b and solve two eqations using the coordinates of the start and end points.


The solution for a rising curve is:

a = 1 / (e^b - 1)

c = -a

https://www.desmos.com/calculator/qquhqjlrjv


The solution for a falling curve is:

a = 1 / (1 - e^b)

c = (1-a)

https://www.desmos.com/calculator/73ufmkfxlb


Approximate values for b used by the Andromeda: 2.2 ("normal", exp 1), 4.4 (exp 2), 5.5 (exp3)


Logarithmic

For same range:

General formula

y = log(x+a) / b + c

where

- a transposes along x

- c transposes along y

- b selects steepness. Larger absolute value for b equals steeper curve. (positive values for rising curve, negative for falling)


The general solution:

Rising: (x, y) = (0, 0) to (1, 1):

a = 1 / (10^b - 1)

c = -log (a) / b

b > 0

https://www.desmos.com/calculator/tyfhantqj8



Falling: (x, y) = (0, 1) to (1, 0)

a = 10^b / (1-10^b)

c = -log(1+a) / b

b < 0

https://www.desmos.com/calculator/s9wahlimnm

The andromeda looks like it uses a b of approx 1.3, 1.7 and 2.2





For the natural logarithm, ln, the solution is:

y = ln(x+a) / b + c


Rising: (x, y) = (0, 0) to (1, 1):

a = 1 / (e^b - 1)

c = -ln (a) / b

b > 0

https://www.desmos.com/calculator/wxkxquiaqn

The andromeda looks like it uses a b of approx 3, 4 and 5


Falling: (x, y) = (0, 1) to (1, 0)

a = e^b / (1-e^b)

c = -ln(1+a) / b

b < 0


PS: The log and ln functions look exactly the same, only b varies.



Usage in envelope code

Our envelope lookup code uses 16bit unsigned ints, so both the x (time) and y (amplitude needs to go from 0 to 65535. This is easily achieved by dividing x with 65535 and multiplying the whole expression with 65535, ex:

y = 65535 * (ae^(-bx/65535) + c)


All testing was done with https://www.desmos.com/calculator


Sunday, April 18, 2021

CV, mux'es and op amps.

 I am working hard to select the appropriate mux and op amp to use for my CV multiplexer.

As stated in previous posts, the OB6 uses a combination of TL062 and 74HCT4051, very common components. When using these (or actually TL072) on my breadboard I see tiny dips of around 30mV-50mV every time the cap is recharged.

I've tried various op amps for buffering the DAC, different buffer op amps and different mux'es. None perform significantly better than what I have now (on my Saleae scope that is). 

Here is a list of what I've tried:

Muxes:

DG4051

CD4051 (worse)

DAC buffer op amps:

TLV9352 

AD711     

OPA2137

TLC071

CV Buffer op amps:

LT1014

TL062


The only thing I have yet to try is the 8ch DAC used by the OB6. It supposedly does not require a buffer.


This is the config I'm going for:

DAC feeding into a 2x gain TL072 op amp using two 10k resistors that feeds a CD74HCT4051 through a 470R resistor. 

The CV buffer is a TL072 with a 1nF C0G cap.

Friday, April 2, 2021

Triple waveform panner using a single CV

I got my SSI2130 VCO, or rather, the DAB2130 (chip soldered onto a breakout board) from amazingsynth.com a few days ago. I'm very much looking forward to figuring out what through zero phase modulation is all about - but that's not today's topic.

Among other things, the 2130 comes with built-in waveshapers for tri/saw/pulse/sine, and multiple linear VCAs to let you do waveform mixing in a single chip.

Reading through the datasheet, I stumbled upon a nice little circuit that could be very useful for me - a single-CV input that will pan (linearly) through three waveforms. The SSI2130 VCAs are current driven, so the input CV is converted into three control currents. Also, the input is 0 to 1V.

I looked at the circuit, and it's basically two precision rectifiers plus a differential amplifier. The rectifiers create the CV for the first and last VCA while the differential amplifier uses the original CV plus 2 x the inverted version of the CV for the last VCA to generate the CV for the middle VCA - one that first rises and then falls. Pretty neat. Here is a simulation of the voltage-output version of the circuit:


 

Using a 5V CV to output 5V CVs is simply a case of replacing the -1V reference voltage with a -5V. 

In MY synth however, I intend to use the AS3364 (quad linear VCA based on the CEM3360 dual VCA). It has a CV range of 0 to 2V. But for the pulse wave, I use a little trick from the Juno to control amplitude without using a VCA. Unfortunately, this needs a 0 to 5V CV.

Luckily, tweaking the resistors in the circuit above lets us do all this without any additional components:


I need to do a little bit of testing, especially sincethe first op amp actually attenuates the original CV slightly (gain is 20/25 = 0.8). The last op amp (differential amplifier) also does something similar. Not sure if that is an issue, we'll just have to see.

Update: Tested with a TL074 (-5 ref generated with a 20k/10k resistor voltage divider between 0 and -15V and buffered using the spare op amp). Works like a charm.

Monday, March 29, 2021

From 3.3mm square to D-shaft

I've bought a ton of 10mm button caps in black sandblasted aluminium. They match my larger potentiometer caps perfectly and I want to use them as potentiometer caps. Only problem is, they are meant for 3.3mm square shafts, not D-shafts, so I had to find a way of replacing the insert inside.

I've experimented with various sizes of 3D-printed inserts and this is my best result:

The inner diameter is 6.2mm, the outer is 7.9-7.95.   

7.95 works with press fit, but 6.2 inner and 7.95 outer made the part stick too hard to the shaft.

6.3 was too loose for the plastic shaft but may work on the metal one - however, there we need a section without D as the D-part is much shorter.

I didn't have time to try 6.25.

The insert height is 9.5mm. The inner height of the cap after removing the existing plastic is barely more than this. However, this seems like the perfect height - it leaves a 2mm gap on the prototype, but that prototype is 2mm lower than the button prototype, meaning that it will be a perfect match if the panel is similar to the button prototype.

The turning force necessary for the metal pot with this 10mm cap is actually ok. Quite heavy but a certain quality feel. The plastic shaft on the other hand feels a bit too light, especially when compared to the bigger caps on the metal pot. However, it is comparable to the force necessary on my other gear (Prophet 5, Little phatty) so I need to make a full mockup to try it properly.





I removed theexisting insert by 

- Drilling a 10mm hole in a wood block, then cutting it in half to make a clamp.

- I then put the clamp around a cap and inserted it into a vice to prevent the cap from rotating during drilling

- Then I drilled a progressively larger hole - 5mm, 6.5mm and finally 8mm.



Saturday, March 13, 2021

AS3364 quad linear VCA

Since I want direct control of my VCAs I consider using linear VCAs instead of the exponential quad x2164. 

Alfa Rpar has come out with the AS3364, a quad version of their CEM3360 clone (AS3360). It drops the exponential input in favour of more VCAs in the same package.

One very unfortunate thing about the 336x is that it cannot be run from a +/-15V supply, which is what I intended to run my synth on. Now, I am considering switching to +/-12V anyway since it may save some power, but still.

Anyway, synths from the 80s, like the OB-8, used the CEM3360 with a +15V Vcc rail. As the chip can have a Vcc-Vee = 26V at max, they used Vee = -5V.

What I wanted to find out was how this affected the signal, especially, would the voltage still swing around 0V?


I breadboarded this tonight, and read the datasheet. The chip has a Vref connected to ground via a 100Ohm resistor and a 5nF cap, I presume that is for centering. 

Here is what I figured out:

  • The voltage swings around 0V even when Vcc and Vee do not have the same absolute value.
  • The maximum swing is to within 1.5V of each supply rail, so with a +15V down to -5V the lowest the VCA can go is -3.5V, anything after this is cut off. 
  • The chip can be run at +15V/-9V, so a 18Vp-p signal is still possible.
  • CV range is 0 (-80dB) to 2V (unity gain). Absolute max VC is 2.5, so be careful!

When connecting the output (as configured in the datasheet) directly to my scope, I saw quite a lot of low pass filtering on the output (but later testing showed that this went away when attaching a non inverting buffer).

I then connected the output to the negative input of an opamp, and put the 47k resistor as negative feedback. This got rid of the LP but introduced a lot of ringing/overshoot. This was removed using a 33pF cap. I got an even cleaner square output with a 15pF so I guess I should do a little calculation here.

I do however see that neither the crumar spirit, nor the OB-8 do any kind of filtering here, presumably it's taken care of later (or by using different op amps). The Jupiter-6 uses 22pF/100k feedback. The Prophet 600 uses a 20k resistor to ground plus a non-inverting buffer.


Update: While at it I've tested the following:

Increasing the feedback resistor 

The output is a current that is fed to the negative input of an op amp. Changing the feedback resistor would have the same effect as in a regular inverting amplifier configuration, but there is no input resistor. However, we know that a 47k resistor gives unity gain, so for example doubling to 94k will double the output voltage, adding a 22k will almost give a 1.5x gain etc. I tested this and it's correct.

Using a non-inverting buffer

Using the circuit in the datasheet, and attaching a non-inverting buffer directly afterwards works very well. No need to filter the output it seems. Increasing the resistor from 47k to 47k+22k gives 1.5x gain. BUT - we still can't go below the negative power rail, so the output is clipped at -3.5V (it looks like 4 on the scope though).

CV Linearity

There is very little response for the first 250mV, the rest seems fairly linear.

Top: CV, 0 to 1.5V. Bottom: Response on a 3V constant input. Notice that nothing happens in the beginning, but then the rest is fairly linear (slightly dropping but not too bad).



CV resistor voltage divider

The maximum CV input is 2.5V, and full range is 0-2V. By using a resistor voltage divider at the input we can transform a 5V CV to a 2V CV for example by combining a 33k from CV to CV input and 22k resistor from CV input to GND. This worked nicely. One could also use two equal resistors to get 2.5V which makes slight maximum adjustments possible.

There is no effect on the linearity so using a voltage divider seems perfectly fine.

Other interesting things

The chip doesn't seem to self destruct immediately if CV is > 2.5V (yeah, that happened, chip still works)

My chip seems to give max gain at CV = 1.5V, not 2V. 

Same as above but with 1.8V max CV. Notice how gain maxes out before the CV reaches its peak.


OB-6 CV generation revisited

After getting the closeups of the OB-6 it's time to put together what I've learned so far.

Hardware

1) The DAC used is AD5668, an 8 channel 16bit DAC with built in voltage reference (2.5 x 2 = 5V). The chip used by Sequential is the AD5668-3 that resets to midscale (2.5V). 

2) The multiplexers are TI CD74HCT4051

3) The op amp buffers are most likely TL06x as that's about the only thing found on the voice card

4) There is no DAC output buffering op amp as that is built into the DAC.

5) I'm not sure what size of sample and hold caps they are using


Timing/performance

Brian from Abstrakt Instruments has a great breakdown of how the refresh is done here:

https://youtu.be/4WwXlRYw_S0?t=1937

Each DAC channel updates 8 cv channels at 24kHz meaning

  • DAC channels are updated at 192kHz
  • There is about 5.2uS available for refreshing a single CV, this includes time to set the DAC, cap charging and any propagation delays/slew through the mux.
  • From the oscilloscope output, a full rail to rail change takes around 3uS

DAC performance

  • The DAC has a max SPI speed of 50MHz, meaning one bit takes 20nS to transfer. Each update is 32bits long, meaning updating 8 channels takes at least 32 * 8 * 20nS = 5120nS = 5.12uS.
  • Settling time is typically 2.5uS, but can be as bad as 7uS. (But it is stated that this is 1/4 to 3/4 settling so that means that it is only a change of 2.5V?)
  • Slew rate is 1.2V/uS

Multiplexer performance

  • On resistance is 90-180Ohm (?)
  • Propagation delay from in to out is 4nS, higher with higher capacitive load but still in the nS range
  • Switch delay is around 20nS
  • Charge injection: does not say.

What does this mean in practice: 


Well, we've got 5.2uS to update a single CV. First of all, if updating all channel takes 5.1uS, this cannot be done during that period. We want to update all channels at once, if we didn't we would need separate address lines for all the multiplexers which is infeasible. 

Luckily the DAC has a LDAC pin. This means we can write data to all channels, and when ready, flip the LDAC and load channels at the same time. By writing the next update while the current one charges the capacitors, we have just enough time to do a full 8ch update. We will also have to use hardware "fire and forget" SPI, writing the necessary 32 bytes of data in the background. If we use blocking SPI, we will have no time left between updates to calculate the next bytes!

Next, we still have to let the dac settle before we turn on the multiplexer output, or we would see an error in the voltage. Settle time is, from both the oscilloscope photo and the datasheet, around 3uS, but it could be as bad as 7uS. I would also think that the slew rate of 1.2V/uS also means that it would take around 6uS for a 5V change.

The multiplexer propagation delay is negligible. That leaves 2uS for charging the cap and turning off the mux again. 

Now, as I've noted in earlier posts, I could charge a 10nF cap rail to rail at 40kHz from a TL072, meaning charge times are around 25uS.  2uS means we need to use a cap at least 1/10th that size, or less than 1nF. 

I did some tests with the DAC8830 and a DG408 multiplexer. Using a 1nF cap did NOT let us fully charge the cap rail to rail in the 5.2uS window.  I got close but not close enough. The AD5668 may be able to deliver more current but that remains to be tested. 

So what do I make of all this? 


I suspect that Sequential is "cheating" here. They haven't spec'ed their system for charging rail to rail in <5uS, as they don't have to! The fastest moving signals would be the envelope attacks, and those NEED intermediate steps to sound good (?). 

I have ordered both the AD5668, CD74HCT4051 and TL072. It will be exciting to see the results of using those parts. Will I still have the charge injection issues? Does the AD5668 charge the caps faster? I will definitely post the results!


OB-6 - closeups

I got some incredibly nice closeup pics of the OB-6 voice card (and parts of the mainboard) from a friend of a friend. They make it really easy to figure out what is going on. You can clearly see the thermistor in the VCO expo converter for example, as well as laugh a little about the fact that they use coolaudio chips (Behringer, remember?). 

Pro tip: Use http://www.smdmark.com to figure out what chips are used from their markings!

Here they are:

Coolaudio V2164 quad expo VCAs. Great little chip.



TL064 all the way!

Top left - the green chip with '33' on it is the thermistor, the K4A is a dual 3904 transistor used as an expo converter

DACs, those are AD5668 8 channel 16 bit dacs

Voice card slots. Notice the HCT4051 CV multiplexers in between.




Thursday, March 11, 2021

Side quest: ribbon controller!

 I have thought for some time that I should drop the ribbon controller, but a few posts on FB sparked a new interest and I may now go for a DIY solution here too.

Some posts: 

https://www.facebook.com/groups/68014942752/permalink/10158488144187753

https://www.youtube.com/watch?v=BdZcVEC8SZU

http://www.deviantsynth.com/2015/09/27/the-volt-axxe/?fbclid=IwAR3tjNLcU9p0SN4fNNYUZ9u39vq12uZNNZIrOOl3KMZ1sD8xJQva7cM2Gdg

https://www.kickstarter.com/projects/156507812/onestring-an-open-source-usb-ribbon-synth-controll?fbclid=IwAR2j7TtJpjW8MtI6q3Ei-PJ1pqZM9gV5V_miraengnvvDj0JxUIsqQQuh3M


Mouser have them, search for Spectra Symbol's soft pots and look under Force Sensors and Load Cells for FSR02CE


Tip: "Use a connector! Use a connector! Use a connector! Don't try to solder directly to the device. Ask me how I know..."


Problem: SoftPots are 400, 500 or 750mm, that's a bad match for a 600mm FSR

Saturday, March 6, 2021

CV refresh issues

Argh, I thought it would be much easier to get stable CVs than it has turned out to be so far.

I spent a long time messing around with clock chips, until I realised that I probably only need to clock eight steps, and that can be done directly using three pins on the microcontroller. This means I won't have to wait for the clock to stabilise, no need to reset it afterwards etc - it just frees up a lot of time.

After this, I realised that I won't have time to update four DACs sequentially and still wait for the last one to settle/sample before moving on. I could solve this with separate address lines and enable lines to each mux, but that would quadruple the needed pins, so I did the only sensible thing - I bit bang the DACs in parallel. Doing this I actually managed to get an SPI speed of 50MHz, though it seems a bit sensitive to noise from my logic probes etc.

Next up, I did not account for the long DAC settle time. The DAC8830 needs at least 1uS to properly settle after a change (it seems it may even be a little more). It then has to stay on until the sample and hold cap is fully charged and even a little longer, until the mux has been turned off again. All this eats of the charge time and means I must use a smaller cap.

Finally, I want to do 16CVs per DAC channel. This means I need to clock the MUX'es at 384kHz to get 24ksps per channel. The total time available to update one channel is thus 2.6uS, meaning we are quickly running out of time.

I've had a lot of problems making this work in practice. I also have had a lot of false alarms due to noise on the scope from neighbouring probes. After reducing the cap size and increasing the time available for the DAC to settle, I'm starting to see some good results. But one stupid issue remains:




When using a Vishay DG408 8ch mux, whenever the mux is turned off, the output jumps up by approximately 200mV! When the mux is turned off again it instantly jumps down to the DACs level. It is always UP however, even if the CV before/after is lower, so it's not crosstalk or similar.

I tried switching back to using a CD4051 but got even worse results then. But there I got LOWER output when the next CV is lower, and HIGHER output when the next is higher, leading me to belive that it is a different issue.


Anyway, I posted a question about this on electro-music.com (https://electro-music.com/forum/viewtopic.php?p=448370#448370) and got a tip that this could possibly be due to charge injection. The poster even linked to more info about it here: https://www.analog.com/en/analog-dialogue/articles/ask-the-applications-engineer-26.html#

Basically, the remedy is to 

- Increase the cap size - Now, I had actually tried this already, and it definitely helps, but it also increases the charge time so I can't reach my goal of 24ksps. 

- Use a slower switching time - this is as far as I know something that is built into the mux so I would have to change to a different mux

- Use a mux with HIGHER on resistance. This also means changing to a different mux.


Soo. 

After posting the question, I revisited the awesome video from Abstrakt Instrument that explains in detail what the OB-6 is doing: https://youtu.be/4WwXlRYw_S0?t=1937

It actually has quite a few important details.

- First of all, the OB-6 uses two 8 channel dacs to update approx 120 channels, meaning each channel only updates 8 CVs. This gives twice the time to do updates so the caps can be doubled.

- Second, the OB-6 actually uses the 4051 mux, but from the video it looks like it is the 74HCT4051.

- It says that the op amp buffers are placed on the voice cards themselves. I've found some closeups of those too (https://www.sequencer.de/syns/davesmith/OB6.html), and it looks like all op amps are in fact TL06x! Those have a very slow slew rate of 3v/uS, perhaps that can affect things too?

I've asked a couple of friends to help me chase down an OB-6 or Prophet-6 to get some even more detailed pics of the circuits, but it really looks like Sequential is doing things the old fashioned way and not with some fancy sample and hold circuit. That makes me so relieved! They even use the cheaper 4051 mux'es. So if Sequential means this is good enough, it's good enough for me - I just need to make it work...


At the moment I'm really in doubt about my next steps. Should I order more parts to test on a breadboard or should I design some circuits and have them produced by JLCPCB? Doing the latter would definitely result in a less noisy board, but it is also much more expensive, and nearly impossible to fix if something is wrong. I consider separating the DACs from both the voice controller and the sample and hold buffers, meaning I would have three cards. Doing this I could replace only parts of the circuit if something doesn't work.

Also, I need to figure out exactly what caps to use.

DAC notes: I thought I could use the DAC8562 dual 16 bit dac, but it has a 10uS settle time (50MHz SPI though). 8552 is even worse, 12uS and 30MHz SPI. In comparison DAC8830 has 1uS settle time and 50MHz SPI

More on OB-6:

The OB 6 uses two 8 channel DAC and each channel updates 8 CVs. Running at 24kHz, each channel must be updated in 5.2uS, this includes dac settle time and capacitor charging.

From the video we can see that a 0 to 5V charge takes around 3uS. This leaves as little as 2uS for charging the cap, so either they accept that the cap isn't fully charged in one cycle in the extreme cases OR they use a very small cap; it would be very interesting to known which one it is. It is also entirely plausible that they never go rail to rail during an update. As the 24kHz refresh rate is to be able to do fast envelopes, they WANT some intermediate steps. If we limit the step size to, say, 1/4th of the max amplitude (5V), we only need 1/4 of the charge time. I think I may have to consider this. If I can quadruple the cap size, effects of charge injection will definitely be reduced. Oh how I wish I could see the labelings on the Abstrakt Instruments DAC board...

Update: 

Now I'm confused. On the AI site it says that they update 16bit CVs 4000times per second...: https://www.kickstarter.com/projects/abstraktinstruments/vs-1-polyphonic-analog-synthesizer


In the video however, he says 48kHz in High resolution mode, and 85 control voltages from an 8ch DAC, meaning more than 8CVs per channel. Maybe some are 48kHz and some slower...

Wednesday, February 10, 2021

CV refresh rates

My Teensy-based voice controller prototype currently has a CV refresh rate of 1kHz. In this post I noted that the OB-6 has a refresh rate of 24kHz for < 1ms attack on envelopes, and the VS-1 OB-X remake uses 48kHz. I want my controller to get closer to those numbers.

I will have 48 CVs. Refreshing them at 40kHz means I need to update the DAC at 1.92MHz. With a 600MHz processor, this leaves around 300 clock cycles per update. It may be possible but could be a little on the short side.

I have tried dividing the CVs into those that will probably be modulated by envelopes, and those that can be a bit more slow moving. I ended up with 32 that I really want to be fast. If at the same time I reduce my refresh rate to what the OB-6 is using, 24kHz, I end up with a refresh rate of 768kHz for the 32 CVs. Add inn a 1kHz+ refresh rate for the remaining 16 and we end up with approximately 800kHz. 

In a new video on the VS-1 I noted that it now has 112CVs. It uses an 8 channel DAC, which means each channel has to be updated at 14 * 48kHz = 672kHz - that's pretty close to what I'm trying to do!


Necessary changes to my circuit

Capacitance

On the 1kHz version I use a 10nF sample & hold cap for 40kHz updates. Increasing to 800kHz means I should probably use a cap with 1/20 the capacitance. Closest match would be 470pF.

I tried putting this into my prototype but I'm having issues with noise - trying to generate a 800kHz square wave for testing doesn't seem to work very well. I switched to using my function generator but still had issues. It could be just because of the breadboard, so I will try this on a beta board, but before that I simulated the circuit in LTSpice to see what it looked like there. 


Initially I had a hard time getting the simulation to work. I couldn't get a proper square wave (I tried using the opamp comparator trick to turn my sine into a sqare), and started worrying that the TL072 is not up to the task. Perhaps the slew rate is too low? 

The datasheet says that the slew rate is between 13 and 20V/uS. In our case we want to charge the cap from 0 to 5V in  1/800000s = 5V/1.25uS = 4V/uS. So the slew rate should not be a problem.

After switching to the built-in pulse generator things looked a little better, but there were heavy noise on the square after I passed it through an op amp buffer. I then realised that by adding a resistor in series with the output, I would get a simple low pass filter. The formula for the filter is 1 / (2*pi*R*C). If we use a 470pF cap, and want an 800kHz cutoff, we need to use a 424 ohm resistor. A more standard value of 390 ohm gives us cutoff at 869kHz. Bear in mind though that this is a one pole filter, so the falloff is not very steep. Still, it should do away with some of the issue.

Simulating this turned out very well indeed, and adding it to the physical circuit also worked wonders for the INPUT to the S & H. The output, however, still looked the same. Connecting a 1k resistor between the output and the scope made it look a lot better.

Input vs output when using a filter resistor

Output still has some distortion at the bottom

Input, ringing is gone


I tried reducing the cap even further to get even higher refresh rates. This did not have the intended effect and I saw the same in the physical circuit as in the simulation. We get about the same response as with the 470pF cap. It looks like we're hitting some other limitation with the op amp perhaps - could it be internal capacitance or something? I'll see if I care to look closer into it.


Top: Square wave input vs output when we don't have a filtering resistor



Square wave vs unbuffered ("ideal") input to op amps (both top and middle are equal) and filtered version  (bottom) outputs


responses - top and middle are again equal and slightly rising towards higher frequencies, bottom shows low pass filtering,


Adding a similar passive filter to the output of the others - top and bottom show same response while middle gets a bit of a resonance peak.


Clock speed

The CD4520 clock can run at speeds up to 1.5MHz. I initially thought this too slow (for 1.92MHz, the refresh rate needed for 48 CVs at 40kHz it definitely is). I tried switching to a 74HC393, but running that at 3v3 meant the clock speed had to be around the same. The logic output also looked like 2V instead of 3v3,  and looked more noisy on the scope. Increasing Vdd to 5V let me run the chip at 3MHz and the logic output increased to 4V.

Something is definitely wrong here. Maybe it is the scope, maybe it is the breadboarding, but the 393 should be capable of clock speeds > 6MHz at 2V. I will test this further with my beta controller. It could also simply be that the timer I use cannot reach higher speeds than 2-3MHz. Oh well, it seems it may not be necessary after all.

As for the CD4051 mux, it probably has some of the same speed limitations as the CD4520. In the production version I will probably use vishay DG406 or similar which will probably work better.

Also, I may try to not use a clock at all, instead directly controlling the addresses of the muxes.


Addressing

To address 48 CVs I will either use 6 8ch MUXes or 3 16ch. Unfortunately, I cannot simply clock them sequentially. I can, however, use a clock for the three/four address lines, and then use the enable pin on each to select what mux to turn on. I would then update all 3/6 channels that have the same mux address sequentially to save time. 

I could possibly also use a separate mux to select which one of the other muxes to address. Doing this would actually make it possible to clock everything from the same clock (but possibly waste some clock cycles as I can either clock 4 or 8 muxes.


Multi channel DACs

Increasing the number of DAC channels would let us do less waits and also decrease the refresh rates since we would update multiple channels in parallel. This last thing is good as it lets us use a bigger cap that will keep its charge longer, giving us a more stable output.




Wednesday, January 27, 2021

Trying to create a CV curve to convert exponential VCA to linear.

In this post I'll try to explain exactly how the xxx2164 (SSM2164, v2164, AS2164 etc) responds to CV and how it (in theory) can be linearised when controlled digitally. I've written V2164 throughout the post as this is the chip I have at hand, but they should all be similar.

NB: I write my math as I go along, so it reflects my way of thinking. It may not be the most direct route to the final result, nor the best way of explaining, but at least I think the results are correct

Whether or not the results are useful in practice are to be seen. The V2164 is temperature sensitive and may not follow the stated -0.033V/dB response at all (or indeed any) temperature. There may also be differences between chips, and the DAC resolution may not be high enough to prevent stepping even when using 16bit DACs.

The V2164 

V2164 has a -33mV/dB response, meaning a 33mV increase leads to a 1dB attenuation.

When using the V2164 with a 3.3V control signal, I realised that it very quickly gets very quiet and thus it's hard to set the exact gain/ attenuation that you want. As mentioned here, the usefull CV range is 2V which results in 2V / 0.033V = 60dB attenuation.

The signal amplitude is doubled/halved for every 6dB change (0.2V in our case) as noted here. That would as far as I understand, mean that the signal is halved 10 times at 2V. With a +/-5V signal input, output would be

$$((((((((((5 / 2) / 2) / 2) / 2) / 2) / 2) / 2) / 2) / 2) / 2) = 5 / 2^{10} = +/- 0.0049V$$

But what is the function / relation between CV and VCA response?


Decibel - change in amplitude 

At any time, the increase in dB between two levels \(a_0\) and \(a\), can be written as

$$d = 20 \cdot log_{10}({a \over a_0})$$

where \(log_{10}\) is the 10-logarithm. From now on I'll write just \(log\)

For example, if the initial amplitude a_0 was 1V and the new level a was 2V, the increase would be

$$d = 20 \cdot log({2 \over 1}) = 6.02dB$$

which is indeed what we said above - a doubling of amplitude is the same as a 6dB change. Let's confirm this with our calculation above - going from 0.0049V to 5V:

$$d = 20 \cdot log({5 \over 0.0049}) = 60.2dB$$

So, how can we rewrite the formula to represent the relationship between our CV and output amplitude?

Let's first express the amplitude change as a function of change in dB

$$d = 20 \cdot log({a \over a_0})$$ $$10^{({d \over 20})} = 10^{log({a \over a_0})} = {a \over a_0}$$ $${a \over a_0} = 10^{({d \over 20})}$$

Taking it one step further to make it easy to plot, we move \(a_0\) to the other side:

$$a = a_0 \cdot 10^{({d \over 20})}$$


Let's check with our initial ratio:

$$a = 1 \cdot 10^{({6.02 \over 20})} = 2$$

Just as expected. Here is a plot of this function:

X is change in dB, Y is amplitude. We can see that the initial amplitude is 1 and that 6dB gives an amplitude of 2. Increasing dB by another 6dB to 12dB shows another doubling of amplitude to 4


From decibel formula to CV response

One final step is necessary, we need to go from the general equation for change in decibel to response to our CV. This should be fairly easy. We know that the response is -0.033V per dB (note: negative volt, i.e. a voltage increase leads to attenuation, not amplification):

$$d_{dB} = {v_{V} \over {-0.033_{V \over dB}}}$$

which gives us a as a function of v volts:

$$a = a_0 \cdot 10^{({{v \over {-0.033}} \over 20})}$$ $$a = a_0 \cdot 10^{({v \over {-0.66}})}$$


Let's check:

Increasing the CV with 0.033V should attenuate the signal 1dB, meaning that a 0.2V signal should attenuate the signal 6dB, which means halving the amplitude. We choose 1 as the initial amplitude, because with CV = 0 the V2164 should have unity gain. While at it, let's rename amplitude a to gain g as that is really what we're talking about when it comes to the VCA:

$$g = g_0 \cdot 10^{({v \over {-0.66}})}$$

\(g_0 = 1\) (unity gain when CV is 0) gives us

$$g = 10^{({v \over {-0.66}})}$$

and finally

$$g = 10^{({0.2 \over {-0.66}})} = 0.5$$

Again, as expected. Here is a plot of the function:

X is CV in volts, Y is gain (unitless). As expected, the signal starts at 1 when the CV is 0, and drops exponentially when the CV increases. at 0.2V the gain has halved to 0.5


Finding the equation for a linear response

Great! Now we know what we're up against. Next, we need something that takes a number - our internal linear control signal, let's call it c - and converts it into something we can input to the VCA CV to counter the function above. We need something that increases it's drop at the same rate as the function above decreases its drop.

So let's see what we've got.


We want the following to be true:

$$10^{({f(c) \over {-0.66}})} = k \cdot c$$

where k is a constant (rate of change, stigningstall in norwegian), in other words, we want something that makes our exponential function linear. We already know that \(f(c) = v\) from our definition, so let's use that.


Now we need to figure out what the relationship between v and c is:

$$log(10^{({v \over {-0.66}})}) = log( k \cdot c)$$ $${v \over {-0.66}} = log( k \cdot c)$$ $$v = -0.66 \cdot log( k \cdot c)$$

This works fine for positive k (e.g. rising linear response), which is what we usually want. However, after \(k \cdot c = 1\) it becomes a negative number which we cannot represent directly with a DAC. Also, when \(k \cdot c = 0\), \(log(k \cdot c)\) is infinite, which means we can never really reach all the way down to 0 gain using an exponentially controlled VCA.

As x approaches 0 from above, y approaches infinity. When x (or rather \(k \cdot c\) in our case) is > 1, y is negative.


Combining the equation for v with our equation for g yields exactly what we want - a linear response (rate of change k times control signal c on the horizontal axis, gain g on the vertical).


For a negative k (e.g. falling response), \(log(k \cdot c)\) is not defined for positive control signals c as \(k \cdot c\) is a negative number. To still be able to use a positive control signal c to represent a falling curve, we need to add something to offset our zero point: \(log(p + k \cdot c)\) where p is the desired gain at c = 0 (e.g. what we get when we set c to 0 and combine our two equations). 

The combined response is not defined for positive values of c when k is negative. 

Adding a constant "shifts" the graph to the right. Here p is 2 and k = -0.5: we get a gain of 2 when c is 0 and a gain of 0 when c is 4. NB: This is just in theory, as explained above we cannot reach g = 2 for c = 0 because the logarithm approaches infinity. More on that further down.


p may still be present for positive values of k, however the same limitation applies - if \(p + k \cdot c < 0\) the result is not defined, and if \(-0.66 \cdot log(p + k \cdot c)\) is negative it cannot be represented directly by a DAC.


Our relation between c and v is thus:

$$v = -0.66 \cdot log( p + k \cdot c)$$

with the limitations

$$p + k \cdot c >= 0$$ $$log(p + k \cdot c) < 0$$


Using this in our equation for the VCA gives us

$$g = 10^{({{-0.66 \cdot log( p + k \cdot c)} \over {-0.66}})}$$ $$g = p + k \cdot c$$

which is indeed a straight line with gain p at \(c = 0\) and gain 0 at \(k \cdot c = -p\)


How to use this in practice

Now, we still have the issue of not being able to reach g = 0. We need to look back at what we said in the beginning, the effective CV range of the V2164 is 0 to 2V, and at 2V it has an attenuation of 60dB (or gain of -60dB). This is what we should use as our minimum value for g. The maximum value should be whatever we want as our maximum gain, noting that unity gain (g=1) is the highest we can get using a DAC directly connected to the VCA.

We need to know exactly what we mean by -60dB in this case. Here, it means -60dB down from unity gain. A change in dB from an initial value of a_0 to a new value a is written as 

$$d = 20 \cdot log({a \over a_0})$$

For us, \(a_0\) is 1 so 

$$20 \cdot log(a) = -60$$ $$log(a) = -3$$ $$a = 10^{-3} = 0.001$$

Let \(c_{start}\) and \(c_{end}\) be the two extremes for our control signal:

This gives us two equations from \(g = p + k \cdot c\)

I) \(g_{start} = p + k \cdot c_{start}\)

II) \(g_{end} = p + k \cdot c_{end}\)

We can now pick our \(g_{start}\), \(g_{end}\), \(c_{start}\) and \(c_{end}\) to find k and p.

Let's give two examples based on whether we want a rising or falling response to our control signal. We choose to use volts as the unit for our control signal and set 0V to 5V as the range. We could also choose the range to match whatever representation we use in our code, for example 0 to 65535 if we represent the control signal as an unsigned int.


For rising control signals

\(g_{start} = 0.001\), \(g_{end} = 1\), \(c_{start} = 0V\) and \(c_{end} = 5V\)

I) \(0.001 = p + k \cdot 0 => p = 0.001\)

II) \(1 = p + k \cdot 5V\)

I + II) \(k \cdot 5V = 1 - 0.001 => k = {0.999 \over 5}\)

Finally, we insert this into our formula for v, \(v = -0.66 \cdot log(p + k \cdot c)\)

\(v = -0.66 \cdot log(0.001 + {0.999 \over 5} \cdot c)\)

Our desired response. A 0 to 5V CV gives a gain of 0.001 to 1

For falling control signals:

\(g_{start} = 1\), \(g_{end} = 0.001\), \(c_{start} = 0V\) and \(c_{end} = 5V\)

I) \(1 = p + k \cdot 0 => p = 1\)

II) \(0.001 = p + k \cdot 5V\)

I + II) \(0.001 = 1 + k \cdot 5V => k \cdot 5V = 0.001 - 1 => k = \frac{-0.999}{5}\)


It should come as no surprise that k is indeed the negative version of the result for the rising control signal, the absolute value of the rate of change is the same for both.

Again we insert this into our formula for v, \(v = -0.66 \cdot log( p + k \cdot c)\)

$$v = -0.66 \cdot log( 1 + \frac{-0.999}{5} \cdot c)$$

Increased attenuation as CV increases. 5V CV gives a gain of 0.001

From CV seen at the VCA to signal that controls the DAC

We have one final step to make all this useful.

We have from the start assumed that whatever we are working with outputs voltages directly from our control signal, and that our \(c_{end}\) outputs exactly 2V. 

This of course is not true for a DAC. We can choose to use a DAC in two ways:

  1. We use a reference voltage of 2V. The max DAC value is then 2V
  2. We use a different reference voltage, say 5V, and use external circuitry to change this into our 2V.

In both cases, we need to know what DAC control signal results in 1V at the VCA control input

Ex: 

If we're using a 16bit DAC and a 2V reference, 1V is represented as 65536 / 2 - 1

If we're using a 16bit DAC and a 5V reference, 1V is represented as 65536 / 5 - 1


Let s be the DAC control signal, \(s_{1V}\) be the DAC control signal value that results in 1V at the VCA input, and v the output voltage seen at the VCA CV input. The relationship between v and d is then

$$v = \frac{d}{s_{1V}}$$


Entering this into our expression for v, \(v = -0.66 \cdot log( p + k \cdot c)\), gives us

$$\frac{s}{s_{1V}} = -0.66 \cdot log( p + k \cdot c)$$

$$s = -0.66 \cdot s_{1V} \cdot log( p + k \cdot c)$$

There is a possible pitfall to be aware of. How well the effort to linearise the VCA works in practice depends on the DAC resolution. The VCA attenuation increases rapidly in the beginning, a very small voltage change gives a huge attenuation. If the DAC resolution is not high enough, each step changes the voltage too much and we will get audible stepping for slow moving CVs.


Summary of useful results

The general equation to linearise the response of the V2164 is

$$s = -0.66 \cdot s_{1V} \cdot log( p + k \cdot c)$$

where 

  • \(s\) is the DAC control signal value, possibly an unsigned int for a 16bit DAC
  • \(s_{1V}\) is the DAC control signal value that gives 1V at the VCA input (e.g. 65536 / 5 - 1 with a 5v reference)
  • \(p\) is the desired VCA gain at c = 0
  • \(k\) is the rate of change (gain / control)
  • \(c\) is our internal control signal with a unit of our choosing
\(p\) and \(k\) are found by selecting min/max gain and min/max control signal values, and solving the following two equations with two unknowns:

I) \(g_{start} = p + k \cdot c_{start}\)

II) \(g_{end} = p + k \cdot c_{end}\)

In practice, gain can never reach 0. For a positive k, p must be > 0. For a negative k we need need to use a g_{end} > 0.

Remember

- k changes when we change between volts and int value for our internal control signal.

- c and s do not have to use the same units

- c is assumed to be positive in all calculations above, but it may very well be possible to use negative values here. I just haven't checked.

- low DAC resolution will lead to audible stepping


Further thoughts

If I remember correctly, the V2164 allows gain > 1 by using a negative CV.  Without actually trying, I would think that using the equations above would suffice for this as well. If you want to add 3dB of extra gain, just extend the desired attenuation down to -63dB and then add - 0.1V (3  * -0.033V) to the DAC output to shift everything 3dB up. I have not tested this though.

To linearise a different VCA with a different response, "just" replace -0.033V/dB in the initial equation for the CV response and the resulting linearising equation. The general cases are:

Let b be the CV response in volts per dB (-0.033V/dB for the V2164). We then get that:

gain as a function of CV is:

$$g = g_0 \cdot 10^{\frac{v}{b * 20}} $$

necessary linearising equation is

$$v = 20 \cdot b \cdot log( p + k \cdot c)$$

and the DAC control value for producing that v is

$$s = 20 \cdot b \cdot s_{1V} \cdot log( p + k \cdot c)$$


The end. Time to try this in real life!


Footnote: All graphs are made using https://www.desmos.com/calculator






Friday, January 22, 2021

Exponential VCA v2164 and CV response

A quick note on the effect of a linear CV on the V2164. I connected a pot between 3.3v and 0. When turning the pot, nothing is heard until the pot is 2/3 of the way to max (CV drops from 3.3 to 0 as the v2164 expects a reversed CV, 0 being max on/unity gain).

Measuring the CV at this point shows as expected, around 1.2V. This means that for the rest of the pot's travel, it has no audible effect. This further strengthens my belief in using linear VCAs for the XM8. Alternatively, one could use a 0 to 1.5v cv, but it will never fully turn off the VCA. 

I'm looking forward to testing the same with a CEM3360/AS3360


Update: This article says that the effective CV range is 2V, which is more like what I experienced:

http://www.sdiy.org/philgallo/mgbvca.html

SPI error handling on the PIC16F

Various stuff happens in the SPI module that indicate errors. Here is a short description of what is going on.

Double buffering

SPI on the PIC16F uses a double buffer consisting of SSPxSR and SSPxBUF. 

SSPxSR is the shift register directly connected to the input, it receives bits when the clock runs. Once 8 bytes have been received, it transfers its content to SSPxBUF, sets the SSPxSTAT.BF (buffer full) bit and raises the SSPxIF interrupt. The BF bit is cleared automatically when reading SSPxBUF.

Data to be transferred is written to SSPxBUF and shifted out either immediately (for master) or the next time the other device runs the clock (for slave).

The following two bits indicate errors in transmission:


SSPxCON1.WCOL

Write Collision. Is set if the user tries to write a new byte to SSPxBUF before the current one has been shifted out/transferred. The data written to SSPxBUF is ignored, and all future writes are also ignored until the WCOL is cleared by the user.


SSPxCON1.SSPOV

Receive overflow. Is set if a new byte is received before the old one is read. Only used when device is an SPI slave. Slave must read SPPxBUF even before transfers to prevent the setting of this bit. On overflow, the current byte in SSPxSR is lost. 

In my DCO I check this when SS is driven high, before copying received data to where the user program expects to find it.


SSPxCON3.BOEN

Buffer overwrite enable. If set to high, data is written to the SSPxBUF even if the current byte has not been read. The datasheet does not say explicitly that it does or does not set the SSPOV bit, but it can safely be ignored. BOEN is used if we want to chain SPI slaves as one long shift register - data written to the slave will automatically be transferred to the SSPxBUF and shifted out once the next byte is received, without being touched by the user code. This way, one can keep the slave select pin low, transfer any number of bytes corresponding to the number of slaves connected, and then raise the slave select pin once all data has been transferred.

This is NOT used for my DCO as it will receive three bytes for each slave before the SS is driven high and thus has its own logic for shifting data internally.


SS pin 

The slave select pin synchronises reception. When in use it will be held high until the master is ready to communicate. The master will lower the pin, then transfer data and finally rise it. Using the SS pin makes sure data does not become out of sync and allows multiple slaves on the same SPI bus.

When the SS pin is driven high, the SPI bit counter is reset to 0, even if less than 8 bits have been received, meaning we will never get out of sync as long as SS is used.


SPI Initialisation

I can't find it right now, but I read that SPI must be initialised only when the clock is in the idle state. It may be that this is just because if not we risk getting incomplete/corrupt data, but it still seems like a good practice.

The way I've achieved this in the DCO is to initialise the SPI when the SS pin goes high the first time. That means that the master can either drive the SS pin low and high again, or it will happen automatically if data is transferred (but the data transferred will be lost) if the slave has restarted for some reason, or starts after the master has sent its first byte. This may not be the solution for everyone but it is sufficient for me. A different option would be to use some other scheme where an additional pin on the slave signals its status as "ready to receive" or similar.

To be able to do this, I had to both set use of SS to true and map a pin as SS, and add an edge trigger interrupt to the same pin. The edge bit should be set to 1 (rising edge).

Another PS for the use of SPI: The TRIS bits for the pins in use must be set manually upon initialisation;

SDI (TRIS set = input)

SDO (TRIS cleared = output)

SS (TRIS set = input)

SCK (TRIS cleared = output for master and TRIS set = input for slave)

Any function not desired may be disabled by setting the opposite data direction/TRIS value.

Wednesday, January 20, 2021

+/-12v vs +/-15v in XM8

CEM3360 may run at +/-12V or +15/-5 to -9V. Because of this, I have to reconsider if I should run the XM8 on +/-12V or +/-15V. I have done a quick review of my modules to see if they are 12v compliant.

Of my modules, these will run fine on 12v

  • Bitcrusher
  • DCO. NB: Needs 3v3 reference voltage
  • Reconstruction filter
  • Distortion
  • Sample & Hold


These will have to be fixed

  • CEM3340
  • Moog filter
  • Ring mod - looks like it's doing some kind of biasing
  • Super saw
  • Wave shaper - may just add external reference
  • V2164 VCA - R9 must be 6k instead of 7.5k according to http://www.sdiy.org/philgallo/mgbvca.html


These are unknowns

  • Jupiter 6 and Juno filters - use +/-15V for trimming and for setting an absolute cutoff for CVs, rest seem ok
  • Noise - has 220k res to 15v at input, need to test
  • v2164 - MD goes to 15v, may be possible to use 12v.


More on CEM3360 and voltages:

https://synth-diy.org/pipermail/synth-diy/2019-April/171021.html

On 3360: https://kassu2000.blogspot.com/2019/03/dual-vca.html

Tuesday, January 19, 2021

Envelopes, VCAs and linear vs exponential

TL;DR: 

  • Use linear VCAs when controlling them digitally, even when controlling audio. That lets you generate whatever control slope you want in software.
  • The VCA response is always exponential, not logarithmic. The only time we're actually talking about something looking more like a logarithmic response is in classic "RC" envelopes where the attack part is more logarithmic. Logarithmic control signals are generally only used to linearise an exponential VCA.

The full text

Through testing the digital envelopes in combination with the v2164 VCA, I realised that all is not good. It was particularly hard to dial in the sustain level as it dropped so fast when turning the pot due to the exponential nature. This made me realise that I had to revisit the topic of envelopes to fully understand how it is done in practice.

My initial confusion stems from the fact that people keep saying that you should use exponential VCAs for audio because they more closely approximate the way our hearing works. While this may be true when using the VCA as a volume control alone, it isn't necessary true elsewhere in the synth.

There is a lot of confusion about the use of the terms log(arithmic) and exp(onential) in the synth world, both when talking about potentiometers, VCAs and envelopes. I'll not go into detail, but just conclude that the slope/response is almost always exponential, not logarithmic. The only time we're actually talking about something looking more like a logarithmic response is in classic "RC" envelopes where the attack part is more logarithmic, and even here it is just an exponential response turned "upside down" (charging a cap instead of uncharging it). Logarithmic control signals are generally only used to linearise the response of an exponential VCA.

Another thing that is repeated is that using an exponential envelope with a linear VCA is the same as using a linear envelope with an exponential VCA. That is almost true, but with an exponential envelope controlling a linear VCA, you get direct control of the sustain level whereas when a linear envelope controls an exponential VCA, we get the "mapped" version of the sustain level which is significantly lower than the control voltage - which may be what you want but I found it hard to actually get the necessary control.

There's another point to be made though. When people talk about exponential envelopes, I suspect they mean the classic ones that is the result of charging and discharging capacitors, "RC" response. Those have a rapid increase upwards at the start of the attack and a rapid decrease at the start of decay. Using a linear envelope with an exponential VCA would give you a slow attack. 

A better name for the stages in an "RC" response envelope seems to be concave upwards and concave downwards. This is not what you get with an exponential VCA controlled by a linear envelope. 

Top: A linear envelope. Middle: The effect of feeding the linear envelope above through an exponential VCA. Note that the attack slopes downward and that the sustain level is significantly lower than the linear input as an exponential VCA drops very fast in the beginning. An exponential envelope would have the same shape but you would of course control the sustain level directly. Bottom: "RC" response, the classic envelope shape you get from charging/discharging a capacitor.


A lot of other versions exists. When you dive into the realm of digitally generated envelopes you find stuff like the Alpha Juno multi stage envelopes where the slope changes on a per-stage basis.

Alpha Juno lets you set envelope by specifying Time and Level for each stage. Slope varies from stage to stage, sometimes being linear (1, 2) and sometimes exponential (3, 4). These envelopes are purely digital.


One question was still unanswered for me - with an exponential envelope, should one make it control an exponential or a linear VCA? I've concluded that it has to control a linear VCA. The issue with sustain level speaks clearly of this. You want the response of the envelope, not an exponential version of it - especially when doing digital envelopes as you can pretty much do whatever shape you like. Hopefully, the resolution of the CV is high enough to mimic exponential growth with a fairly good quality even at low volumes.


What VCA chip to use in the XM8

Having to use linear VCAs kind of sucks. I was hoping to use the v2164 quad VCA extensively because it offers four VCAs in a compact package and at a reasonable price. If envelopes should control linear VCAs, and if I want to be able to patch envelopes anywhere, I also need to use linear VCAs everywhere. My best option seems to be the AS3330, which is a dual lin/exp VCA costing almost twice that of the V2164 meaning I have to spend four times as much on VCAs. That in itself kind of suck, but it will also take twice the space on the PCB which REALLY sucks. 

I will give the V2164 a final try though. If I can generate a logarithmic control signal, the output response will be linear. There is a very standard circuit going around that does this by combining two 2164s, but that sort of defeats the purpose. I have to do it digitally. This may result in very low resolution for the higher volumes, we'll just have to see.

Update: AS3364 is a quad linear VCA, that may be a good option. Unfortunately it's +/- 12V, not 15. I've ordered 10 of them for testing. I also realised that I have both AS3330 and AS3360 chips that I can try if I want. The AS3364 seems to be a dual AS3360 but with the exponential inputs removed, the text and specs in the datasheet is almost identical. This is good as it makes it possible to replace the AS3364 (which is an Alpha Rpar specific chip) with two 3360s on an adapter board later, should one fail and no replacements be available.


Resources

https://www.muffwiggler.com/forum/viewtopic.php?t=217707

https://www.muffwiggler.com/forum/viewtopic.php?t=115675

https://www.gearslutz.com/board/electronic-music-instruments-and-electronic-music-production/984069-embarrassing-question-explain-alpha-junos-envelopes.html

https://musicianonamission.com/adsr/

https://www.muffwiggler.com/forum/viewtopic.php?t=102357