Startup issues again

I've finally managed to test controlling the DAC more closely from software.

By disabling SPI output from the voice controller to the DAC during DAC power cycling, I was not able to reproduce the error. It simply seems like the DAC - or something around it - does not like SPI traffic while powering up. 

Introducing a delay before talking to DAC, and monitoring the 12V line from the main controller and then disabling DAC output if it goes away (and again, delaying when 12V is reintroduced), we should hopefully fix the issue. 

A little research into the startup problems

TL;DR: The DAC isn't starting up correctly, causing the CVs to either be the wrong value or to fluctuate.

There are two weird things that sometimes happen during startup. 

1) We get massive noise (but with a fixed frequency on the output

2) We get some kind of slew on the square wave, e.g. it is not flat on top.

Not sure if 2 happens at the same time as 1, but 2 can at least happen on its own

 

After a little measuring, I found that

1 comes from the waveshaper. It is present on all inputs but the DCO input is super clean.

2 comes from something between the square wave output of the waveshaper and the input of the bus mixer.

So what's between them? The waveform mixer and the oscillator output switch, but for the moment that's replaced with a jumper - so it's only the waveform mixer. It is implemented directly on the mainboard, except for the VCA chip.

Output on top, output from waveshaper on the bottom. WS looks good 

 

Input at the source mixer on the bottom. Here it's slanted.

The mixer PULA is the square wave input, the square wave amp sits before the pulse output on the waveshaper

This is interesting. The only thing between the waveshaper and the source mix board is that op amp. But the mixer also feeds into it, so maybe some of the other waveforms are leaking through?

Also note that the output wave has some strange spikes on it (the same ones for each cycle) that are not found on the mixer input. Approximately 12? 

 

Here is something more.

When square is slanted, triangle is not aligned:

The triangle does not match up

 

Triangle with a good signal

Trims when slew: 2.0, 2.8V (center, symmetry)

Trims when clean: 2.3, 3.0V (these are also what is expected).

Let's look at the DAC

With slew

DAC ref voltage: 2.1 to 2.386

Output on DAC ref voltage pin, too low and fluctuates

Output on one of the channels, is too low

When clean

DAC ref voltage 2.5V 

DAC ref voltage is perfect

Output on the same channel as above. Looks good.

 

 

DAC +5V and GND inputs are clean even with slew

 

As for resetting the issue - turning off and waiting a short time had no effect. But quickly turning off and on made it go away.

The errors appear without turning off +5V, only +/-12V. 

On some rare occations the output flatlines on startup. On a single one, DAC output latched at something else than 0 (?) and a mix of two sources (?) could be seen on the output.

With the new seventyPWR, I have only been able to reproduce case 1 two times. It may be caused by the DAC too?

Edit: I managed t reproduce the extremely noisy case after reconnecting the old PSU and running two voice cards.

GND on the DAC is stable, the +5V very slightly wobbles, but nothing extreme.

 

The Vref however, is 4.23V, way too high:

 

DAC ref voltage should be 2.5V but is 4.23! Also note that the noise on the voice output is following the same pattern for each cycle, it's not random noise

The DAC output looks like it follows the correct "pattern" but the amplitude is of course way too high too.

 

DAC output is higher than it should

Now, as for the waveshaper - DCO input looks as it should, but everything else is garbage. Interestingly, the symmetry and center trim inputs are not stable voltages, but jump up and down. Moving further down the signal path, the mixer input channel 2 CV is also not stable. 

Mixer input channel 2 CV

Waveshaper 2 center CV

Waveshaper 2 symmetry CV

Waveshaper 1 center CV

Waveshaper 1 symmetry CV

It simply looks like the CV mux is not able to generate stable CVs, either because the clocking is wrong or because the DAC output is too high, making it settle at the wrong voltage. In other words, the massive noise is ALSO caused by the DAC. That's nice to know!

DAC8565 and 16ch sample and hold

I intend to use the DAC8565 quad 16 bit DAC for the XM8, I've even bought 20 of them on breakout board and written a test - but for some reason, I haven't written anything about it.

Right now I'm making the final CV mux board, so I had to retest my program. For some reason though, it doesn't complie anymore?

In my code I'm using SPI.send24 as well as SPI.hasInterruptFlagSet, SPI.clearInterruptFlag and SPI.enableInterrupt. 

I can't find ANYTHING about send24 anywhere, and very little about the others. But I found another SPI project locally, SPI-master, that has the send24 code. It says it is from https://www.pjrc.com/teensy/td_libs_SPI.html, but going there leads nowhere. Not sure what has happened, I feel completely gaslit!

Anyway - I copied the SPI-master into my project to get send24. As for the interrupt stuff, it's not really necessary as it only makes it possible to listen to send completes to trigger Load dac - and this can be done in software without penalty anyway, by adding it to the setting of the last DAC channel.

Ok, so how do we use the DAC8565.

The following pin config works:

pin 1,2, 7 and 8 are the four output channels

pin 3, Vref H, is the high reference voltage. It outputs the internal reference voltage (2.5V) if the internal voltage reference is used, and should be connected to ground through a 150nF cap. If using an external voltage reference instead, it can have an additional 4.8uF (!) cap to ground for reduced noise.

It is important to note that the max output when using the internal reference is 2.5V. To get a 5V output, we need to use an external 5V reference.

It is also important to note that the external reference CANNOT be higher than the Analog voltage AVDD, or the output will be clipped. 

Pin 4, AVdd, power for the analog parts. It may be 3v3 if using the internal 2.5V reference as output, or 5V if using an external reference.

Pin 5, Vref L, the low reference voltage. Usually connected to GND

Pin 6, GND

Pin 9: !Sync. = SPI Chip select

Pin 10: Serial clock

Pin 11: D in, Serial data. Connect to master MOSI

Pin 12, IOVdd. This should match the logic level of the MCU, which for the Teensy is 3v3. However, I had some success setting this to 5V even with 3v3 output, but I get glitches when running the SPI bus at 50MHz. Also, it says in the spec sheet that 3v3 logic has a max bus speed of 25MHz (I have successfully used 50MHz on the current breadboarded circuit, and 46MHz earlier, but IOVdd must be 3v3.

I will try using 5V logic but that requires a high speed level shifter between the Teensy and the DAC.

Pin 13: !RST - when set to 0, all DAC outputs are reset to the value of RSTSEL

Pin 14: RSTSEL - reset select. If 0, DACs power up and reset to 0, if 1 they reset to the middle of the reference voltage.

Pin 15: !Enable - "Connects the SPI interface to serial port". This is currently confusing me though connecting it to 0 works fine.

Pin 16: LDAC: Load Dac. Connect to GND and control this through software or connect to MCU

Running a loop with IOVdd at 3v3, AVdd at 5V and using a 5V external reference

50MHz SPI works fine

There is significant noise on the output

The noise is however only while the SPI bus transfers. This may make it bearable even if present in the real circuit, as we can transfer the data and let the signal settle before turning on the output muxes that load the sample and hold caps.

5V IOVdd also works...

Unfortunately, we get glitches at 5V IOVdd

The glitches go away when reverting to 3v3IOVdd

With MUX

I spent a long time trying to get my 16ch CV buffer to work with the DAC. Turns out I had mislabeled pin D0, it should be next to D1, not next to GND. 

Anyway, once I got that out of the way, the 16ch board works fine:

DAC Output through opamp buffer and 470R to mux. Works great!

Output is very stable. DAC slightly overshoots when switching (meastured after the buffer I think)

I tried various combinations:

5V external reference, 470Ohm resistor directly to DAC

5V external reference, no resistor, DAC directly to mux. DAC has no problem driving the charging

2.5V internal reference, 2x positive gain op amp, 470R input resistor

5V external reference, 470R input, no buffer. Something is very wrong! Not sure exactly what.

Some closeups

Extreme closeup of 2.5V ref through 2x gain and 470R resistor.

Extreme closeup of 5V ref, buffered and 470R resistor. Pretty much the same

Extreme closeup of 5V ref direct from dac without resistor. A tad noisier?

Then some charge times:

Dac output when run as 5V ref direct from DAC without resistor. Rise time is around 5.5uS

5V ref direct from DAC without resistor. Charge time 0 to 5V for CV buffer cap. Around 1.5uS

This is as far as I got, because here I somehow killed the Teensy :-( I would have liked to have the same two checks when running with 2.5V internal reference and 2x gain through 470R. Have to look for a new Teensy

...oh, I found one. Let's go on

Cap charge time through 470R resistor, around 3.4uS

But what if we change to a 220R instead?

Cap charge time through 220R resistor, around 2.2uS

 

That's pretty good. Let's look at the DAC settling time:

Rise time from 0 to 5V, as seen at the output of the buffer after the DAC, is around 2.9uS. The drops in voltage coincides with the charging of the caps and are not present at the DAC output.

All in all, this looks very promising. For my first production version I will use a 2x positive gain buffer with a 220R charging cap.

DAC8565

I had some DAC8565 (quad 16bit DAC) breakout boards made at JLCPCB, and just tested them, they work fine.

The datasheet says that SPI speed for < 3.6V Vdd is limited to 25MHz, above that it's 50MHz. I am able to run the SPI at 45MHz at 3v3 though, and it seems stable. 50MHz does NOT work.

Here are my connections for using the internal 2.5V reference. It is especially important to note that the VrefL must be connected to ground even if using the internal reference:

1: VoutA

2: VoutB

3: VrefOut: 150nF to GND

4: AVdd: 3v3 + 100nF decoupling cap to GND

5: VrefL: GND

6: GND

7: VoutC

8: VoutD

9: !SYNC: SPI CS

10: SCLK: SCLK

11: Din: MOSI

12 IOVdd: 3v3

13: !RST: 3v3

14: RSTSEL: GND (binary input)

15: !ENABLE: GND

16: LDAC: GND or pin on MCU if doing hardware LDAC, this can also be done using a command.