I've finally started testing the new cards. First off is the 56 channel CV generation card.
After first testing the 4ch DAC on a breadboard, driving the old 16ch sample and hold cards, and making sure the code ran perfectly on that, I connected the DAC to the CV board and the CV board to a Teensy 4.0 and...
...nothing.
No output at all on the output pins.
A quick check in Eagle revealed the first major bug - I've forgotten to connect the rear row of the connectors, only the front one is connected. Not a problem for testing but it will require a lot of soldering to bridge all the 56 outputs.
I then switched to the rear pins and...
...again, nothing.
Damn. I do however try to run the DAC at 50MHz and 5V logic supply, from a 3v3 Teensy. It wouldn't be surprising if that lead to some issues.
I left the card for a few days and returned yesterday. This time I disconnected the DAC and put it on a separate breadboard, running 16 wires over there. I could then connect probes to the inputs and outputs to see if the DAC itself was actually doing anything.
And what do you know, this time everything worked immediately! Very strange. Perhaps the long wires or the connected probes changed something.
Thus, today, I moved the DAC back to the CV board, but left it slightly high to be able to connect clip on probes onto the DAC board pins while it was inserted into the CV board. And this time it worked!
Finally, I disconnected the probes, one by one. When I got to the probe on the SPI clock pin, everything stopped working. I reconnected it and disconnected all the rest, and it started working again.
As a last try, I connected the probe to the other end of the SPI clock wire, close to the teensy. This time it stopped working too.
Sooo... not sure EXACTLY what is going on, but perhaps the added load/capacitance of the probe slows down or filters the clock slightly?
Anyway, once I got everything working, the output looks great!
 |
Closeup of one of the outputs shows a fairly stable level, the noise seen is 0.005V which is most likely the minimum step on the scope ADCs.
|
 |
Four simultaneous outputs
|
Update:
I've tested all channels and they work great. I also tried reducing the SPI speed to 25MHz to see if that changed anything with regards to needing the probes on the clock bus but it didn't help.
I did notice too that the sample and hold op amps get very hot but I experienced the same on the previous 16ch board so I'm not too worried.
Logic level converter
I have designed a small 4 channel logic level converter board based on the TI SN74LVC2T45 IC. It will translate the 3v3 Teensy level to the 5V the DAC expects. I use 5V on the DAC as that's necessary to run at 50MHz.
Most level converters are way too slow for 50MHz, but the TI chip datasheets says that 420 Mbps is possible when doing 3.3V to 5V translation. We'll see.
I also have the option of rewiring the CV board by cutting a jumper and soldering another one, to make the DAC run at 3V3. My most recent breadboard tests seemed to show that it would be possible but it DOES feel a bit risky for a final design.
