Voice Controller v1.2b testing, including 16ch sample & hold

I've finally started testing the voice controller card that I made last spring. It's been so long it's almost a bit scary to start testing.

Voice card controller with peripherials

In the image above: To the left is the PSU interface. At the moment I get +/-12V from a Doepfer PSU. A 5V input is available but not used as the Teensy gets 5V from USB and powers the rest of the circuit through its internal 3.3V regulator. To change this later requires a trace on the Teensy to be cut.

The teensy (4.1) is the long narrow board closest to the top. Below it is my custom DCO, and left and right of that is DCO memory and reconstruction filter respectively. 

The tiny chip on a tiny PCB to the right of the midi sockets is a DAC, the card has room for four of them to be run in parallel.

Each DAC controls a 16ch multiplexed sample & hold card - those are shown to the right. In theory this should give me 64 CVs to play around with when the card is fully populated.

At the bottom is two port expander cards, each with 16 i/o pins for a total of 32 digital pins that can control switches etc on the voice card.

Testing

So far I've tested: 

Midi in and out - both work flawlessly. I use an H11L1 optocoupler running at 3.3v, both resistors in the input circuit are 220Ohm.

The two DCO positions, they both work fine but I only had one working DCO so I couldn't test sync between them. DCOs are controlled through SPI1 (hardware SPI).

DCO with constantly changing frequency, showing how it does NOT reset on frequency changes. Mmmmm.... Calibration is not in place yet so it does not reach full amplitude.

Port expander. I had to write my own little lib for these but it works great. Shares SPI1 with the DCOs.

DAC in slot 1. It's controlled via bit banged SPI at 50MHz and works great :) 

Now, yesterday I did a bit of soldering for the first time in years. I've built an enclosure that I hoped could help me with my health issues, but I'm not satisfied, I still felt considerable discomfort afterwards. Not completely sure of why though, but that's for another post.

Anyway, that meant that today I'm able to test the sample & hold circuits. First tests are very promising. Running the DAC at half the reference voltage (3.3v from the Teensy at the moment) shows 3.279-3.284 on my Saleae Logic Pro 16 scope pins , and alternating between 0 and 3.3v on each s&h pin shows hardly any visible artifacts at the start of each charge cycle. I'm using a 470R resistor between the dac buffer and the s&h mux btw, and this is the S&H board with 1nF caps (I have some with 2.2nF too, I will experiment with both combinations later).

I see a tiiiny dip at the start of the cycle, it consistently drops to 3.274V. The Logic Pro resolution is 5mV, so exactly how much a constant value fluctuates and how much it drops on charging is unknown, but around 5 to 10mV at most seems to be a good estimate. On the breadboard this drop was 30 to 50mV, so we're almost at an order of magnitude improvement, that's a good thing. A quick test with a board with 2.2nF caps instead of 1nF made the dip go away completely - but such a board may not be able to achieve the refresh rate / charge speed we need.

The dip when charging, dropping from 3.284/3.279 to 3.274 on the scope

The hold time is approx 80uS and there is no visible droop during that time. It also means that our refresh rate is around 12.5kHz.

A 5mV drop means we're seeing a 0.1% error at that moment. However, it only lasts for 0.3uS (out of the 80uS per cycle). I think it would be very hard to notice even for pitch CV though it may introduce a slight vibrato, who knows.